A card (PICC—proximity integrated circuit) mode near field communications (NFC) device with a small loop antenna needs to do active load modulation in order to reach ISO required load modulation amplitude. This means that instead of using a load-modulation switch that alters an impedance loading of the antenna, it is necessary to actively transmit a signal back to the proximity coupled device (PCD). This transmitted signal effectively overwrites the NFC antenna signal received from the PCD. The ISO standard for this active load modulation requires the active load modulation signal to remain synchronized to the transmitted carrier. To remain synchronous during the load modulation process (where it is not possible to use the PCD generated carrier as a reference) it is desirable to generate in the PICC-mode NFC device a highly stable clock with the same frequency as the PCD carrier.
US2015/063517 discloses an apparatus comprising a first phase locked loop (PLL) circuit and a second PLL circuit. The first PLL circuit receives a stable reference-oscillation signal, and, in response to a PLL-PLL control signal indicating a frequency offset, adjusts a fractional divider ratio of the first PLL circuit. A second PLL circuit receives a carrier signal that is transmitted over a communications channel from a non-synchronous device, and generates the PLL-PLL control signal. The first PLL circuit and the second PLL circuit are together configured to produce an output frequency signal that is synchronous to the carrier signal.
It is desired to be able to vary the phase between the PCD clock and the active load modulated signal transmitted by the PICC mode device with a high resolution.